UMC_BASE__INST5_SEG4 1464 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST5_SEG4 0 UMC_BASE__INST5_SEG4 810 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST5_SEG4 0 UMC_BASE__INST5_SEG4 1027 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST5_SEG4 0 UMC_BASE__INST5_SEG4 1027 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST5_SEG4 0 UMC_BASE__INST5_SEG4 1272 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST5_SEG4 0 UMC_BASE__INST5_SEG4 879 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST5_SEG4 0