UMC_BASE__INST4_SEG3 1456 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST4_SEG3 0 UMC_BASE__INST4_SEG3 802 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST4_SEG3 0 UMC_BASE__INST4_SEG3 1020 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST4_SEG3 0 UMC_BASE__INST4_SEG3 1020 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST4_SEG3 0 UMC_BASE__INST4_SEG3 1265 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST4_SEG3 0 UMC_BASE__INST4_SEG3 1112 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define UMC_BASE__INST4_SEG3 0 UMC_BASE__INST4_SEG3 871 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST4_SEG3 0