UMC_BASE__INST3_SEG4 1450 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST3_SEG4                       0
UMC_BASE__INST3_SEG4  796 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST3_SEG4                       0
UMC_BASE__INST3_SEG4 1015 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST3_SEG4                       0
UMC_BASE__INST3_SEG4 1015 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST3_SEG4                       0
UMC_BASE__INST3_SEG4 1260 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST3_SEG4                       0
UMC_BASE__INST3_SEG4 1107 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define UMC_BASE__INST3_SEG4                      0
UMC_BASE__INST3_SEG4  865 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST3_SEG4                       0