UMC_BASE__INST3_SEG3 1449 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST3_SEG3                       0
UMC_BASE__INST3_SEG3  795 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST3_SEG3                       0
UMC_BASE__INST3_SEG3 1014 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST3_SEG3                       0
UMC_BASE__INST3_SEG3 1014 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST3_SEG3                       0
UMC_BASE__INST3_SEG3 1259 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST3_SEG3                       0
UMC_BASE__INST3_SEG3 1106 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define UMC_BASE__INST3_SEG3                      0
UMC_BASE__INST3_SEG3  864 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST3_SEG3                       0