UMC_BASE__INST2_SEG3 1442 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST2_SEG3 0 UMC_BASE__INST2_SEG3 788 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST2_SEG3 0 UMC_BASE__INST2_SEG3 1008 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST2_SEG3 0 UMC_BASE__INST2_SEG3 1008 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST2_SEG3 0 UMC_BASE__INST2_SEG3 1253 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST2_SEG3 0 UMC_BASE__INST2_SEG3 1100 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define UMC_BASE__INST2_SEG3 0 UMC_BASE__INST2_SEG3 857 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST2_SEG3 0