UMC_BASE__INST2_SEG2 1441 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST2_SEG2 0x00426000 UMC_BASE__INST2_SEG2 787 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST2_SEG2 0 UMC_BASE__INST2_SEG2 1007 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST2_SEG2 0 UMC_BASE__INST2_SEG2 1007 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST2_SEG2 0 UMC_BASE__INST2_SEG2 1252 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST2_SEG2 0 UMC_BASE__INST2_SEG2 1099 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define UMC_BASE__INST2_SEG2 0 UMC_BASE__INST2_SEG2 856 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST2_SEG2 0