UMC_BASE__INST0_SEG3 1428 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST0_SEG3                       0
UMC_BASE__INST0_SEG3  774 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST0_SEG3                       0
UMC_BASE__INST0_SEG3  996 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST0_SEG3                       0
UMC_BASE__INST0_SEG3  996 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST0_SEG3                       0
UMC_BASE__INST0_SEG3 1241 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST0_SEG3                       0
UMC_BASE__INST0_SEG3 1088 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define UMC_BASE__INST0_SEG3                      0
UMC_BASE__INST0_SEG3  843 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST0_SEG3                       0