UMC_BASE__INST0_SEG2 1427 drivers/gpu/drm/amd/include/arct_ip_offset.h #define UMC_BASE__INST0_SEG2                       0x00425800
UMC_BASE__INST0_SEG2  773 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define UMC_BASE__INST0_SEG2                       0
UMC_BASE__INST0_SEG2  995 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define UMC_BASE__INST0_SEG2                       0
UMC_BASE__INST0_SEG2  995 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define UMC_BASE__INST0_SEG2                       0
UMC_BASE__INST0_SEG2 1240 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define UMC_BASE__INST0_SEG2                       0
UMC_BASE__INST0_SEG2 1087 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define UMC_BASE__INST0_SEG2                      0
UMC_BASE__INST0_SEG2  842 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define UMC_BASE__INST0_SEG2                       0