TLB_W 119 arch/microblaze/include/asm/mmu.h # define TLB_W 0x00000008 /* Caching is write-through */ TLB_W 50 arch/powerpc/include/asm/nohash/32/mmu-40x.h #define TLB_W 0x00000008 /* Caching is write-through */