TLB_I             120 arch/microblaze/include/asm/mmu.h #  define TLB_I			0x00000004 /* Caching is inhibited */
TLB_I              51 arch/powerpc/include/asm/nohash/32/mmu-40x.h #define TLB_I           0x00000004      /* Caching is inhibited */