THM_TMON0_RDIR3_DATA__Z__SHIFT  475 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT 0x00000000
THM_TMON0_RDIR3_DATA__Z__SHIFT 4286 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR3_DATA__Z__SHIFT 4276 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR3_DATA__Z__SHIFT 3494 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR3_DATA__Z__SHIFT 4408 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR3_DATA__Z__SHIFT 4106 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR3_DATA__Z__SHIFT  298 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT                                                                        0x0
THM_TMON0_RDIR3_DATA__Z__SHIFT  442 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIR3_DATA__Z__SHIFT                                                                        0x0