THM_TMON0_RDIR2_DATA__VALID__SHIFT  467 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT 0x0000000b
THM_TMON0_RDIR2_DATA__VALID__SHIFT 4282 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT 0xb
THM_TMON0_RDIR2_DATA__VALID__SHIFT 4272 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT 0xb
THM_TMON0_RDIR2_DATA__VALID__SHIFT 3490 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT 0xb
THM_TMON0_RDIR2_DATA__VALID__SHIFT 4404 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT 0xb
THM_TMON0_RDIR2_DATA__VALID__SHIFT 4102 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT 0xb
THM_TMON0_RDIR2_DATA__VALID__SHIFT  292 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT                                                                    0xb
THM_TMON0_RDIR2_DATA__VALID__SHIFT  436 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIR2_DATA__VALID__SHIFT                                                                    0xb