THM_TMON0_RDIR1_DATA__Z__SHIFT  463 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT 0x00000000
THM_TMON0_RDIR1_DATA__Z__SHIFT 4274 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR1_DATA__Z__SHIFT 4264 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR1_DATA__Z__SHIFT 3482 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR1_DATA__Z__SHIFT 4396 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR1_DATA__Z__SHIFT 4094 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR1_DATA__Z__SHIFT  284 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT                                                                        0x0
THM_TMON0_RDIR1_DATA__Z__SHIFT  428 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__Z__SHIFT                                                                        0x0