THM_TMON0_RDIR1_DATA__TEMP__SHIFT  459 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT 0x0000000c
THM_TMON0_RDIR1_DATA__TEMP__SHIFT 4278 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR1_DATA__TEMP__SHIFT 4268 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR1_DATA__TEMP__SHIFT 3486 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR1_DATA__TEMP__SHIFT 4400 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR1_DATA__TEMP__SHIFT 4098 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR1_DATA__TEMP__SHIFT  286 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT                                                                     0xc
THM_TMON0_RDIR1_DATA__TEMP__SHIFT  430 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIR1_DATA__TEMP__SHIFT                                                                     0xc