THM_TMON0_RDIR15_DATA__TEMP__SHIFT  453 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT 0x0000000c
THM_TMON0_RDIR15_DATA__TEMP__SHIFT 4362 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR15_DATA__TEMP__SHIFT 4352 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR15_DATA__TEMP__SHIFT 3570 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR15_DATA__TEMP__SHIFT 4484 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR15_DATA__TEMP__SHIFT 4182 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIR15_DATA__TEMP__SHIFT  384 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT                                                                    0xc
THM_TMON0_RDIR15_DATA__TEMP__SHIFT  528 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIR15_DATA__TEMP__SHIFT                                                                    0xc