THM_TMON0_RDIR10_DATA__Z__SHIFT  427 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT 0x00000000
THM_TMON0_RDIR10_DATA__Z__SHIFT 4328 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR10_DATA__Z__SHIFT 4318 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR10_DATA__Z__SHIFT 3536 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR10_DATA__Z__SHIFT 4450 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR10_DATA__Z__SHIFT 4148 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT 0x0
THM_TMON0_RDIR10_DATA__Z__SHIFT  347 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT                                                                       0x0
THM_TMON0_RDIR10_DATA__Z__SHIFT  491 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__Z__SHIFT                                                                       0x0