THM_TMON0_RDIR10_DATA__TEMP_MASK  422 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK 0x00fff000L
THM_TMON0_RDIR10_DATA__TEMP_MASK 4331 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK 0xfff000
THM_TMON0_RDIR10_DATA__TEMP_MASK 4321 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK 0xfff000
THM_TMON0_RDIR10_DATA__TEMP_MASK 3539 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK 0xfff000
THM_TMON0_RDIR10_DATA__TEMP_MASK 4453 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK 0xfff000
THM_TMON0_RDIR10_DATA__TEMP_MASK 4151 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK 0xfff000
THM_TMON0_RDIR10_DATA__TEMP_MASK  352 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK                                                                      0x00FFF000L
THM_TMON0_RDIR10_DATA__TEMP_MASK  496 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIR10_DATA__TEMP_MASK                                                                      0x00FFF000L