THM_TMON0_RDIL5_DATA__TEMP__SHIFT  387 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0x0000000c
THM_TMON0_RDIL5_DATA__TEMP__SHIFT 4206 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL5_DATA__TEMP__SHIFT 4196 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL5_DATA__TEMP__SHIFT 3414 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL5_DATA__TEMP__SHIFT 4328 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL5_DATA__TEMP__SHIFT 4026 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL5_DATA__TEMP__SHIFT  202 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT                                                                     0xc
THM_TMON0_RDIL5_DATA__TEMP__SHIFT  346 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT                                                                     0xc