THM_TMON0_RDIL4_DATA__TEMP__SHIFT  381 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0x0000000c
THM_TMON0_RDIL4_DATA__TEMP__SHIFT 4200 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL4_DATA__TEMP__SHIFT 4190 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL4_DATA__TEMP__SHIFT 3408 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL4_DATA__TEMP__SHIFT 4322 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL4_DATA__TEMP__SHIFT 4020 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL4_DATA__TEMP__SHIFT  195 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT                                                                     0xc
THM_TMON0_RDIL4_DATA__TEMP__SHIFT  339 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT                                                                     0xc