THM_TMON0_RDIL3_DATA__TEMP__SHIFT  375 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0x0000000c
THM_TMON0_RDIL3_DATA__TEMP__SHIFT 4194 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL3_DATA__TEMP__SHIFT 4184 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL3_DATA__TEMP__SHIFT 3402 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL3_DATA__TEMP__SHIFT 4316 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL3_DATA__TEMP__SHIFT 4014 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL3_DATA__TEMP__SHIFT  188 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT                                                                     0xc
THM_TMON0_RDIL3_DATA__TEMP__SHIFT  332 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT                                                                     0xc