THM_TMON0_RDIL1_DATA__TEMP__SHIFT  363 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0x0000000c
THM_TMON0_RDIL1_DATA__TEMP__SHIFT 4182 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL1_DATA__TEMP__SHIFT 4172 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL1_DATA__TEMP__SHIFT 3390 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL1_DATA__TEMP__SHIFT 4304 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL1_DATA__TEMP__SHIFT 4002 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0xc
THM_TMON0_RDIL1_DATA__TEMP__SHIFT  174 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT                                                                     0xc
THM_TMON0_RDIL1_DATA__TEMP__SHIFT  318 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT                                                                     0xc