THM_TMON0_RDIL15_DATA__Z__SHIFT  361 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT 0x00000000
THM_TMON0_RDIL15_DATA__Z__SHIFT 4262 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL15_DATA__Z__SHIFT 4252 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL15_DATA__Z__SHIFT 3470 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL15_DATA__Z__SHIFT 4384 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL15_DATA__Z__SHIFT 4082 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL15_DATA__Z__SHIFT  270 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT                                                                       0x0
THM_TMON0_RDIL15_DATA__Z__SHIFT  414 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIL15_DATA__Z__SHIFT                                                                       0x0