THM_TMON0_RDIL0_DATA__Z__SHIFT  325 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT 0x00000000
THM_TMON0_RDIL0_DATA__Z__SHIFT 4172 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL0_DATA__Z__SHIFT 4162 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL0_DATA__Z__SHIFT 3380 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL0_DATA__Z__SHIFT 4294 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL0_DATA__Z__SHIFT 3992 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT 0x0
THM_TMON0_RDIL0_DATA__Z__SHIFT  165 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT                                                                        0x0
THM_TMON0_RDIL0_DATA__Z__SHIFT  309 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_RDIL0_DATA__Z__SHIFT                                                                        0x0