THM_TMON0_INT_DATA__Z__SHIFT  319 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT 0x00000000
THM_TMON0_INT_DATA__Z__SHIFT 4364 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT 0x0
THM_TMON0_INT_DATA__Z__SHIFT 4546 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT 0x0
THM_TMON0_INT_DATA__Z__SHIFT 3572 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT 0x0
THM_TMON0_INT_DATA__Z__SHIFT 4678 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT 0x0
THM_TMON0_INT_DATA__Z__SHIFT 4568 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT 0x0
THM_TMON0_INT_DATA__Z__SHIFT  389 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT                                                                          0x0
THM_TMON0_INT_DATA__Z__SHIFT  533 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define THM_TMON0_INT_DATA__Z__SHIFT                                                                          0x0