TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 8793 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT                                                                     0x4
TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 4552 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT                                                                     0x4
TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 4026 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT                                                                     0x4
TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 3932 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT                                                                     0x4
TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 10917 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 0x00000004
TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 13870 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 0x4
TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 15738 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 0x4
TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 16308 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define TD_CNTL__SYNC_PHASE_VC_SMX__SHIFT 0x4