TDC_MV_AVERAGE__IDDC__SHIFT 2614 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define TDC_MV_AVERAGE__IDDC__SHIFT 0x10
TDC_MV_AVERAGE__IDDC__SHIFT 2612 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define TDC_MV_AVERAGE__IDDC__SHIFT 0x10
TDC_MV_AVERAGE__IDDC__SHIFT 2772 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define TDC_MV_AVERAGE__IDDC__SHIFT 0x10
TDC_MV_AVERAGE__IDDC__SHIFT  900 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define TDC_MV_AVERAGE__IDDC__SHIFT 0x10
TDC_MV_AVERAGE__IDDC__SHIFT  928 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define TDC_MV_AVERAGE__IDDC__SHIFT 0x10