TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 9024 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT                                                              0xa
TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 10551 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT                                                              0xa
TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 10381 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT                                                              0xa
TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 14448 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 0xa
TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 16348 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 0xa
TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 16928 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define TC_CFG_L2_ATOMIC_POLICY__POLICY_5__SHIFT 0xa