TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 8832 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT                                                              0xa
TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 10359 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT                                                              0xa
TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 10189 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT                                                              0xa
TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 14266 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 0xa
TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 16166 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 0xa
TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 16746 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define TC_CFG_L1_STORE_POLICY__POLICY_10__SHIFT 0xa