TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT__SHIFT 9112 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT__SHIFT                                                          0x1e
TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT__SHIFT 10639 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT__SHIFT                                                          0x1e