TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT_MASK 9128 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT_MASK                                                            0xC0000000L
TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT_MASK 10655 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TCC_EDC_CNT__UC_ATOMIC_FIFO_SED_COUNT_MASK                                                            0xC0000000L