TCC_EDC_CNT__SRC_FIFO_DED_COUNT__SHIFT 9106 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TCC_EDC_CNT__SRC_FIFO_DED_COUNT__SHIFT                                                                0x12
TCC_EDC_CNT__SRC_FIFO_DED_COUNT__SHIFT 10633 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TCC_EDC_CNT__SRC_FIFO_DED_COUNT__SHIFT                                                                0x12