TCC_EDC_CNT__RETURN_CONTROL_SED_COUNT_MASK 9127 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TCC_EDC_CNT__RETURN_CONTROL_SED_COUNT_MASK                                                            0x30000000L
TCC_EDC_CNT__RETURN_CONTROL_SED_COUNT_MASK 10654 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TCC_EDC_CNT__RETURN_CONTROL_SED_COUNT_MASK                                                            0x30000000L