TCC_EDC_CNT__LATENCY_FIFO_SED_COUNT__SHIFT 9109 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TCC_EDC_CNT__LATENCY_FIFO_SED_COUNT__SHIFT                                                            0x18
TCC_EDC_CNT__LATENCY_FIFO_SED_COUNT__SHIFT 10636 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TCC_EDC_CNT__LATENCY_FIFO_SED_COUNT__SHIFT                                                            0x18