TCC_EDC_CNT2__WRITE_CACHE_READ_SED_COUNT_MASK 9138 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TCC_EDC_CNT2__WRITE_CACHE_READ_SED_COUNT_MASK                                                         0x0000000CL
TCC_EDC_CNT2__WRITE_CACHE_READ_SED_COUNT_MASK 10663 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TCC_EDC_CNT2__WRITE_CACHE_READ_SED_COUNT_MASK                                                         0x0000000CL