TCC_DSM_CNTLA__LATENCY_FIFO_IRRITATOR_DATA_SEL_MASK 9228 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TCC_DSM_CNTLA__LATENCY_FIFO_IRRITATOR_DATA_SEL_MASK                                                   0x00600000L
TCC_DSM_CNTLA__LATENCY_FIFO_IRRITATOR_DATA_SEL_MASK 10751 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TCC_DSM_CNTLA__LATENCY_FIFO_IRRITATOR_DATA_SEL_MASK                                                   0x00600000L
TCC_DSM_CNTLA__LATENCY_FIFO_IRRITATOR_DATA_SEL_MASK 10537 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define TCC_DSM_CNTLA__LATENCY_FIFO_IRRITATOR_DATA_SEL_MASK                                                   0x00600000L