TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 8952 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT                                                                     0x12
TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 4684 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT                                                                     0x12
TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 4158 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT                                                                     0x12
TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 4064 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT                                                                     0x12
TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 10529 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 0x00000012
TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 13960 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 0x12
TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 15842 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 0x12
TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 16422 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define TA_STATUS__FL_SFIFO_EMPTYB__SHIFT 0x12