TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 27961 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT                                                                    0x0
TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 20132 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT                                                                    0x0
TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 21465 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT                                                                    0x0
TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 21395 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT                                                                    0x0
TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 10457 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x00000000
TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 13946 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x0
TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 15828 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x0
TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 16408 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define TA_CS_BC_BASE_ADDR__ADDRESS__SHIFT 0x0