TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 3032 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 0x0
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 4470 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 0x0
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 4662 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 0x0
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 3646 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 0x0
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 4766 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 0x0
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 4670 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE__SHIFT 0x0