TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 3031 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 0xf
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 4469 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 0xf
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 4661 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 0xf
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 3645 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 0xf
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 4765 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 0xf
TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 4669 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX__TARGET_STATE_MASK 0xf