TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 3754 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10
TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 5188 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10
TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 5380 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10
TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 4368 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10
TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 5488 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10
TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 5392 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10
TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 1990 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_sh_mask.h #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10