SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 10365 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 0x0000001e
SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 7362 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 0x1e
SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 8150 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 0x1e
SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 8704 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SXIFCCG_DEBUG_REG3__sx0_receive_fifo_write__SHIFT 0x1e