SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 10322 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 0x00008000L
SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 7307 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 0x8000
SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 8095 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 0x8000
SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 8649 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SXIFCCG_DEBUG_REG1__statevar_bits_vs_out_misc_vec_ena_MASK 0x8000