SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK 3381 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK 0x1000
SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK 55730 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK                                                          0x00001000L
SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK 39439 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK                                                          0x00001000L
SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK 74874 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK                                                          0x00001000L
SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK 44216 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define SWRST_GENERAL_CONTROL__CONFIG_XFER_MODE_MASK                                                          0x00001000L