SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT 3556 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT 0x18
SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT 55888 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT                                                                0x1e
SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT 39678 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT                                                                0x1e
SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT 75113 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT                                                                0x1e
SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT 44370 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define SWRST_CONTROL_3__RESETPHY0_ATEN__SHIFT                                                                0x1e