SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT 3402 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT 0x12
SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT 55745 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT                                                               0x1a
SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT 39455 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT                                                               0x1a
SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT 74890 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT                                                               0x1a
SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT 44231 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define SWRST_COMMAND_0__BIF0_CORE_RESET__SHIFT                                                               0x1a