SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT 3410 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT 0x16
SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT 55749 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT                                                             0x1e
SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT 39459 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT                                                             0x1e
SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT 74894 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT                                                             0x1e
SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT 44235 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define SWRST_COMMAND_0__BIF0_CONFIG_RESET__SHIFT                                                             0x1e