SQ_WAVE_IB_STS__VALU_CNT__SHIFT 42674 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT                                                                       0xc
SQ_WAVE_IB_STS__VALU_CNT__SHIFT 28463 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT                                                                       0xc
SQ_WAVE_IB_STS__VALU_CNT__SHIFT 29700 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT                                                                       0xc
SQ_WAVE_IB_STS__VALU_CNT__SHIFT 30028 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT                                                                       0xc
SQ_WAVE_IB_STS__VALU_CNT__SHIFT 9925 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT 0x0000000d
SQ_WAVE_IB_STS__VALU_CNT__SHIFT 12592 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT 0xc
SQ_WAVE_IB_STS__VALU_CNT__SHIFT 14474 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT 0xc
SQ_WAVE_IB_STS__VALU_CNT__SHIFT 14872 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_WAVE_IB_STS__VALU_CNT__SHIFT 0xc