SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 42704 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT                                                                 0x2
SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 28516 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT                                                                 0x2
SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 29753 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT                                                                 0x2
SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 30081 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT                                                                 0x2
SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 14350 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 0x2
SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 14748 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_WAVE_IB_DBG1__TA_NEED_RESET__SHIFT 0x2