SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 42659 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK                                                                     0x0000FF00L
SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 28451 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK                                                                     0x00003F00L
SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 29688 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK                                                                     0x00003F00L
SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 30016 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK                                                                     0x00003F00L
SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 9870 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x00003f00L
SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 12575 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x3f00
SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 14457 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x3f00
SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 14855 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x3f00