SQ_VOP_SDWA_SDST_ENC__SRC1_SEL__SHIFT 3104 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_VOP_SDWA_SDST_ENC__SRC1_SEL__SHIFT                                                                 0x18
SQ_VOP_SDWA_SDST_ENC__SRC1_SEL__SHIFT 2954 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_VOP_SDWA_SDST_ENC__SRC1_SEL__SHIFT                                                                 0x18
SQ_VOP_SDWA_SDST_ENC__SRC1_SEL__SHIFT 2912 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_VOP_SDWA_SDST_ENC__SRC1_SEL__SHIFT                                                                 0x18